#!/usr/bin/perl -w # # Copyright (C) 2002 M&N Logistik-Lösungen Online GmbH # written by H.Schurig # Released unter the GNU GPL, comes as-is, without any warranty # use strict; #my $lccr0 = 0x00300879; #my $lccr1 = 0x1010193f; #my $lccr2 = 0x000004ef; #my $lccr3 = 0x03001812; # Penkey 760: my $lccr0 = 0x1000f9; my $lccr1 = 0x8a053f; my $lccr2 = 0x40408ef; my $lccr3 = 0x4700007; sub ShowReg($$$) { my ($reg, $val, $page) = @_; printf " %-8s 0xx = ", $reg . ':', $val; my $i = 31; my $mask = 0x80000000; while ($i>=0) { print $val & $mask ? '1' : '0'; print " " if $i == 8; print " " if $i == 16; print " " if $i == 24; $i--; $mask = $mask >> 1; } print " (Page $page)\n"; } #ShowReg('mn LCCR0', $lccr3, '7-20'); #ShowReg('as LCCR0', 0x340ff0c, '7-20'); print "\n\nLCD Configuration:\n"; ShowReg('LCCR0', $lccr0, '7-20'); print " - ENB: LCD controller ", $lccr0 & 1 ? 'enabled' : 'disabled', "\n"; print " - CMS: ", $lccr0 & 2 ? 'monochrome' : 'color', " selected\n"; print " - SDS: ", $lccr0 & 4 ? 'dual' : 'single', "-panel display selected\n"; print " - LDM: LCD generates interrupt when done\n" unless $lccr0 & 8; print " - SFM: LCD generates interrupt on start of frame\n" unless $lccr0 & 0x10; print " - IUM: LCD generates interrupt on fifo underrun\n" unless $lccr0 & 0x20; print " - EFM: LCD generates interrupt on end of frame\n" unless $lccr0 & 0x40; print " - PAS: ", $lccr0 & 0x0080 ? 'active' : 'passive', " display selected\n"; #print " - ", $lccr0 & 0x0100 ? 'big' : 'little', "-endian selected\n"; print " - DPD: double pixel data mode\n" if $lccr0 & 0x100; print " - DIS: LCD controller has been disabled\n" if $lccr0 & 0x200; print " - QDM: LCD quick disable mask\n" if $lccr0 & 0x400; ShowReg('LCCR1', $lccr1, '7-27'); print " - PPL: Pixels per line: ", $lccr1 & 0x3ff, " + 1\n"; print " - HSW: Horizonatal sync pulse width: ", $lccr1 >> 10 & 0x3f, " + 1\n"; print " - ELW: End of line clock wait count: ", $lccr1 >> 16 & 0xff, " + 1\n"; print " - BLW: Beginning of line pixel clock wait count: ", $lccr1 >> 24 & 0xff, " + 1\n"; ShowReg('LCCR2', $lccr2, '7-30'); print " - LPP: Lines per panel: ", $lccr2 & 0x3ff, " + 1\n"; print " - VSW: Vertical sync pulse width ", $lccr2 >> 10 & 0x3f, " + 1\n"; print " - EFW: End of frame line clock wait count: ", $lccr2 >> 16 & 0xff, "\n"; print " - BFW: Beginning of frame line clock wait count: ", $lccr2 >> 24 & 0xff, "\n"; ShowReg('LCCR3', $lccr3, '7-33'); print " - PCD: Pixel clock divisor: ", $lccr3 & 0xff, "\n"; print " - ACB: AC pin bias frequency: ", $lccr3 >> 8 & 0xff, "\n"; print " - API: AC pin transitions per interrupt: ", $lccr3 >> 16 & 0xf, "\n"; print " - VSP: L_FCLK is active-", $lccr3 & 0x10000 ? 'low' : 'high', "\n"; print " - HSP: L_LCLK is active-", $lccr3 & 0x20000 ? 'low' : 'high', "\n"; print " - PCP: Data is driven to LCD on ", $lccr3 & 0x40000 ? 'falling' : 'rising', " edge of L_PCLK\n"; print " - OEP: L_BIAS is active-", $lccr3 & 0x80000 ? 'low' : 'high', "\n"; print " - BPP: Bits per Pixel: ", 1 << ($lccr3 >> 24 & 0x7), "\n"; print " - DPC: L_PCLK is driven at ", $lccr3 & 0x8000000 ? 'double' : 'normal', " PCD frequency\n"; #ShowReg('DBAR1', $dbar1, '10-42'); #ShowReg('DCAR1', $dcar1, '10-43'); #ShowReg('DBAR2', $dbar2, '10-44'); #ShowReg('DCAR2', $dcar2, '10-44'); #ShowReg('LCSR', $lcsr, '10-47');